Field of the Invention
This invention relates to processing systems and, more particularly, to cache memory systems of low-cost processing systems.
Description of the Related Art
Embedded processing systems include increasing numbers of processing elements (e.g., both heterogeneous and homogeneous multiprocessors, graphics processors, video processors, direct memory access controllers, or other processing engines). Those processing elements may execute at frequencies higher than the executing frequency of on-chip memory and off-chip memory. A typical embedded processing system includes a cache memory to improve the performance of high speed processing elements that access those slower memories. In general, cache memory is an expensive element with respect to size and power dissipation. The cost of cache memory is less of an issue in large processing systems than in small, low-cost, low-power embedded processing systems. Thus, large processing systems typically include large caches, while low-cost processing systems include relatively small caches and redundant caches may be cost-prohibitive in the latter systems. In addition, large caches of large processing systems typically have low cache miss rates that have negligible impact on system performance, whereas cache misses of small caches in small, low-cost, low-power applications may have substantial impact on performance. Accordingly, improved cache memory techniques are desired.
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